Density is a much-sought advantage in electronic components. If specifications can be maintained while reducing the size of a component, devices made from those components can be made using less material (reducing cost and weight) while also reducing bulk. Or, a component can be given enhanced specifications with the same amount of material, if that leads to superior devices. While transistor density has increased dramatically for decades, improvements in “passive” components such as capacitors have not kept pace.
Multilayer ceramic capacitors, or MLCCs, have traditionally been made by forming a tape from insulating ceramic slurry, printing conductive ink layers, and then pressing the layers together and sintering to form a laminated alternation of insulator (dielectric) and conductor. Particularly in the case of a physically large capacitor, there is a possibility of delamination under the stress of temperature or pressure. If a layer separates, even slightly, there is a drop in the capacitance that can render it out of specification, or there can be complete device failure. In addition, the process may be limited to simple flat layers and complex shapes may not be possible.
The goal, therefore, is to find a way to increase both the capacitance and the maximum voltage for a given form factor. As such, there is a need for a technique that is better equipped to optimize geometrical features to increase specifications of an MLCC.